flow_control: CRC documentation from modbus specifications
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		| @@ -10,26 +10,33 @@ import time | ||||
|  | ||||
| DEBUG = False | ||||
|  | ||||
| """ | ||||
| 6.2.2 CRC Generation  | ||||
| ==================== | ||||
| The Cyclical Redundancy Checking (CRC) field is two bytes, containing a 16–bit binary value. The CRC value is calculated by the  | ||||
| transmitting device, which appends the CRC to the message. The device that receives recalculates a CRC during receipt of the  | ||||
| message, and compares the calculated value to the actual value it received in the CRC field. If the two values are not equal, an error  | ||||
| results. | ||||
| crc_test = "\x0d\x01\x00\x62\x00\x33" | ||||
| crc_expected = 0xddd | ||||
|  | ||||
| The CRC is started by first preloading a 16–bit register to all 1’s. Then a process begins of applying successive 8–bit bytes of the  | ||||
| message to the current contents of the register. Only the eight bits of data in each character are used for generating the CRC. Start  | ||||
| and stop bits and the parity bit, do not apply to the CRC.  | ||||
| During generation of the CRC, each 8–bit character is exclusive ORed with the register contents. Then the result is shifted in the  | ||||
| direction of the least significant bit (LSB), with a zero filled into the most significant bit (MSB) position. The LSB is extracted and  | ||||
| examined. If the LSB was a 1, the register is then exclusive ORed with a preset, fixed value. If the LSB was a 0, no exclusive OR takes  | ||||
| place. | ||||
|  | ||||
| This process is repeated until eight shifts have been performed. After the last (eighth) shift, the next 8–bit character is exclusive ORed  | ||||
| with the register’s current value, and the process repeats for eight more shifts as described above. The final content of the register,  | ||||
| after all the characters of the message have been applied, is the CRC value.  | ||||
| A procedure for generating a CRC is:  | ||||
| def crc(message): | ||||
|     """ | ||||
|     (from "Modbus_over_serial_line_V1_02.pdf" at http://www.modbus.org) | ||||
|  | ||||
|     6.2.2 CRC Generation  | ||||
|     ==================== | ||||
|     The Cyclical Redundancy Checking (CRC) field is two bytes, containing a 16–bit binary value. The CRC value is calculated by the  | ||||
|     transmitting device, which appends the CRC to the message. The device that receives recalculates a CRC during receipt of the  | ||||
|     message, and compares the calculated value to the actual value it received in the CRC field. If the two values are not equal, an error  | ||||
|     results. | ||||
|  | ||||
|     The CRC is started by first preloading a 16–bit register to all 1’s. Then a process begins of applying successive 8–bit bytes of the  | ||||
|     message to the current contents of the register. Only the eight bits of data in each character are used for generating the CRC. Start  | ||||
|     and stop bits and the parity bit, do not apply to the CRC.  | ||||
|     During generation of the CRC, each 8–bit character is exclusive ORed with the register contents. Then the result is shifted in the  | ||||
|     direction of the least significant bit (LSB), with a zero filled into the most significant bit (MSB) position. The LSB is extracted and  | ||||
|     examined. If the LSB was a 1, the register is then exclusive ORed with a preset, fixed value. If the LSB was a 0, no exclusive OR takes  | ||||
|     place. | ||||
|  | ||||
|     This process is repeated until eight shifts have been performed. After the last (eighth) shift, the next 8–bit character is exclusive ORed  | ||||
|     with the register’s current value, and the process repeats for eight more shifts as described above. The final content of the register,  | ||||
|     after all the characters of the message have been applied, is the CRC value.  | ||||
|     A procedure for generating a CRC is:  | ||||
|  | ||||
|      1. Load a 16–bit register with FFFF hex (all 1’s). Call this the CRC register.  | ||||
|      2. Exclusive OR the first 8–bit byte of the message with the low–order byte of the 16–bit CRC register, putting the result in the  | ||||
| @@ -43,16 +50,11 @@ A procedure for generating a CRC is: | ||||
|      7. The final content of the CRC register is the CRC value.  | ||||
|      8. When the CRC is placed into the message, its upper and lower bytes must be swapped as described below.  | ||||
|       | ||||
| Placing the CRC into the Message  | ||||
| When the 16–bit CRC (two 8–bit bytes) is transmitted in the message, the low-order byte will be transmitted first, followed by the high-  | ||||
| order byte.  | ||||
| """ | ||||
|     Placing the CRC into the Message  | ||||
|     When the 16–bit CRC (two 8–bit bytes) is transmitted in the message, the low-order byte will be transmitted first, followed by the high-  | ||||
|     order byte.  | ||||
|     """ | ||||
|  | ||||
| crc_test = "\x0d\x01\x00\x62\x00\x33" | ||||
| crc_expected = 0xddd | ||||
|  | ||||
|  | ||||
| def crc(message): | ||||
|     crc = 0xffff  # step 1 | ||||
|     for byte in message: | ||||
|         if type(byte) == type(str): | ||||
|   | ||||
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