This should make sure that the card is finnished recording

data, timeout forces a trigger event. The timout value is
obtained from the length of the job.
Fixes T57
This commit is contained in:
Markus Rosenstihl 2017-07-04 17:56:18 +02:00
parent 449ae0c9ef
commit 36be8e00c6

View File

@ -81,19 +81,22 @@ bool SpectrumM2i40xxSeries::Configuration::bOpenCard() {
// set up gated sampling mode // set up gated sampling mode
spcm_dwSetParam_i32(hDrv, SPC_CARDMODE, SPC_REC_STD_GATE); spcm_dwSetParam_i32(hDrv, SPC_CARDMODE, SPC_REC_STD_GATE);
// set up single trigger mode
//spcm_dwSetParam_i32(hDrv, SPC_CARDMODE, SPC_REC_STD_SINGLE); //spcm_dwSetParam_i32(hDrv, SPC_CARDMODE, SPC_REC_STD_SINGLE);
// set up external TTL trigger // use external TTL trigger
spcm_dwSetParam_i32(hDrv, SPC_TRIG_ORMASK, SPC_TMASK_EXT0); spcm_dwSetParam_i32(hDrv, SPC_TRIG_ORMASK, SPC_TMASK_EXT0);
// trigger start on rising edge
spcm_dwSetParam_i32(hDrv, SPC_TRIG_EXT0_MODE, SPC_TM_POS); spcm_dwSetParam_i32(hDrv, SPC_TRIG_EXT0_MODE, SPC_TM_POS);
//spcm_dwSetParam_i32(hDrv, SPC_PRETRIGGER, 16384); //spcm_dwSetParam_i32(hDrv, SPC_PRETRIGGER, 128);
//spcm_dwSetParam_i32(hDrv, SPC_POSTTRIGGER, 128);
//spcm_dwSetParam_i32(hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK0_CH0); //spcm_dwSetParam_i32(hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK0_CH0);
//spcm_dwSetParam_i32(hDrv, SPC_TRIG_CH0_MODE, SPC_TM_POS); //spcm_dwSetParam_i32(hDrv, SPC_TRIG_CH0_MODE, SPC_TM_POS);
//spcm_dwSetParam_i32(hDrv, SPC_TRIG_TERM, 1); spcm_dwSetParam_i32(hDrv, SPC_TRIG_TERM, 0); // termination 0=1MOhm 0=50Ohm
//spcm_dwSetParam_i32(hDrv, SPC_TRIG_DELAY, 2000); //spcm_dwSetParam_i32(hDrv, SPC_TRIG_DELAY, 2000);
//spcm_dwSetParam_i32(hDrv, SPC_TIMEOUT, 5000); //spcm_dwSetParam_i32(hDrv, SPC_TIMEOUT, 5000);
return true; return true;
} }
@ -118,6 +121,11 @@ char* SpectrumM2i40xxSeries::Configuration::PrintInfo() {
strcat(sInfo, sTmp); strcat(sInfo, sTmp);
sprintf(sTmp, " Library Version %d.%02d build %d\n", lLibVersion >> 24, (lLibVersion >> 16) & 0xff, lLibVersion & 0xffff); sprintf(sTmp, " Library Version %d.%02d build %d\n", lLibVersion >> 24, (lLibVersion >> 16) & 0xff, lLibVersion & 0xffff);
strcat(sInfo, sTmp); strcat(sInfo, sTmp);
sprintf(sTmp, " Features enabled: %d\n", lFeatureMap);
strcat(sInfo, sTmp);
sprintf(sTmp, " External clock: %.3f MHz\n", (float) ext_reference_clock/1e6);
strcat(sInfo, sTmp);
#if SPC_DEBUG #if SPC_DEBUG
sprintf(sTmp, "Debug Information:\n"); sprintf(sTmp, "Debug Information:\n");
@ -156,7 +164,6 @@ SpectrumM2i40xxSeries::SpectrumM2i40xxSeries(const ttlout& t_line, int ext_refer
default_settings.ext_reference_clock = ext_reference_clock; // Hz default_settings.ext_reference_clock = ext_reference_clock; // Hz
effective_settings=NULL; effective_settings=NULL;
fprintf(stderr, "clock %i\n", ext_reference_clock);
// initializing adc info class with card ID at 0 // initializing adc info class with card ID at 0
default_settings.lCardID = 0; default_settings.lCardID = 0;
@ -167,11 +174,11 @@ SpectrumM2i40xxSeries::SpectrumM2i40xxSeries(const ttlout& t_line, int ext_refer
// clock mode setup // clock mode setup
// external clock // external clock
//spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKMODE, SPC_CM_EXTREFCLOCK); spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKMODE, SPC_CM_EXTREFCLOCK);
//spcm_dwSetParam_i32(default_settings.hDrv, SPC_REFERENCECLOCK, default_settings.ext_reference_clock); spcm_dwSetParam_i32(default_settings.hDrv, SPC_REFERENCECLOCK, default_settings.ext_reference_clock);
spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKMODE, SPC_CM_INTPLL); //spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKMODE, SPC_CM_INTPLL);
spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKOUT, 1); //spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCKOUT, 1);
spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCK50OHM, 1); // ToDo: test this //spcm_dwSetParam_i32(default_settings.hDrv, SPC_CLOCK50OHM, 1); // ToDo: test this
fprintf(stderr, "\nADC card initialized\n"); fprintf(stderr, "\nADC card initialized\n");
} }
@ -516,29 +523,33 @@ result* SpectrumM2i40xxSeries::get_samples(double _timeout) {
adc_timer.start(); adc_timer.start();
int adc_status; int adc_status;
spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status); spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status);
#if SPC_DEBUG
fprintf(stderr, "card status: %x; waiting for trigger\n", adc_status); fprintf(stderr, "card status: %x; waiting for trigger\n", adc_status);
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_TIMEOUT, 1000); #endif
int adc_timeout = (int) (effective_settings->timeout*1000) + 200;
if (spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_WAITTRIGGER) == ERR_TIMEOUT) { spcm_dwSetParam_i32(effective_settings->hDrv, SPC_TIMEOUT, adc_timeout);
fprintf(stderr, "no trigger detected, timing out and forcing one now\n"); //spcm_dwSetParam_i32(effective_settings->hDrv, SPC_TIMEOUT, 0);
if (spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_WAITTRIGGER) == ERR_TIMEOUT) {
fprintf(stderr, "No trigger detected, timing out and forcing one now\n");
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_FORCETRIGGER); spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_FORCETRIGGER);
} }
/*
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_TIMEOUT, 0); while (core::term_signal == 0 && (adc_status & M2STAT_CARD_READY) == 0 && adc_timer.elapsed() <= effective_settings->timeout + 2) {
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_WAITREADY);
/*while (core::term_signal == 0 && (adc_status & M2STAT_CARD_READY) == 0 && adc_timer.elapsed() <= effective_settings->timeout) {
timespec sleeptime; timespec sleeptime;
sleeptime.tv_nsec = 10*1000*1000; // 10 ms sleeptime.tv_nsec = 10*1000*1000; // 10 ms
sleeptime.tv_sec = 0; sleeptime.tv_sec = 0;
nanosleep(&sleeptime, NULL); nanosleep(&sleeptime, NULL);
spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status); spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status);
fprintf(stderr, "card status: %x\n", adc_status); fprintf(stderr, "card status: %x\n", adc_status);
}*/ }
fprintf(stderr, "ADC finished. Stopping\n"); */
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_TIMEOUT, 0 );
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_WAITREADY);
fprintf(stderr, "ADC finished. Stopping\n");
spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_STOP); spcm_dwSetParam_i32(effective_settings->hDrv, SPC_M2CMD, M2CMD_CARD_STOP);
if (core::term_signal != 0) { if (core::term_signal != 0) {
fprintf(stderr, "core::term_signal !=0 \n");
free(adc_data); free(adc_data);
return NULL; return NULL;
} }
@ -548,10 +559,17 @@ result* SpectrumM2i40xxSeries::get_samples(double _timeout) {
fprintf(stderr, "adc_status not ready: %i \n", adc_status); fprintf(stderr, "adc_status not ready: %i \n", adc_status);
throw SpectrumM2i40xxSeries_error("timeout occured while collecting data"); throw SpectrumM2i40xxSeries_error("timeout occured while collecting data");
} }
spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status);
#if SPC_DEBUG
fprintf(stderr, "adc_status: 0x%x \n", adc_status);
#endif
fprintf(stderr, "Starting data transfer.\n"); fprintf(stderr, "Starting data transfer.\n");
spcm_dwDefTransfer_i64 (effective_settings->hDrv, SPCM_BUF_DATA, SPCM_DIR_CARDTOPC, 0, adc_data, 0, memSize); spcm_dwDefTransfer_i64 (effective_settings->hDrv, SPCM_BUF_DATA, SPCM_DIR_CARDTOPC, 0, adc_data, 0, memSize);
spcm_dwSetParam_i32 (effective_settings->hDrv, SPC_M2CMD, M2CMD_DATA_STARTDMA | M2CMD_DATA_WAITDMA); spcm_dwSetParam_i32 (effective_settings->hDrv, SPC_M2CMD, M2CMD_DATA_STARTDMA | M2CMD_DATA_WAITDMA);
spcm_dwGetParam_i32(effective_settings->hDrv, SPC_M2STATUS, &adc_status);
fprintf(stderr, "adc_status: 0x%x \n", adc_status);
char szErrorText[ERRORTEXTLEN]; char szErrorText[ERRORTEXTLEN];