207 lines
4.4 KiB
C
207 lines
4.4 KiB
C
///////////////////////////////////////////////////////////////////////////////
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//
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// pci416df.h: defines data structures to access PCI416 DAQ devices
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// Copyright (c) Datel, Inc. 1997
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// Platform: Win95, Win NT
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// Compiler: MVC4.0 + DDK
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// Version: 3.0
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// Author: GS
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// created: 2/4/97
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// modified: 7/9/98
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// History: V1.1 MCSR and INTCSR moved to "pcilib32.h"
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// V3.0 now for Win 95 and NT
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///////////////////////////////////////////////////////////////////////////////
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#ifndef PCI416DF_H
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#define PCI416DF_H
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#include "pcilib32.h"
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#ifndef REALTYPE
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#define REALTYPE double
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#endif
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#define UROUND(X) (DWORD)(X + 0.5)
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#define FFIFO 0x2000 // samples = WORDS
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#define HFIFO 0x1000 // samples
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#define CAPS_SIZE 5 // number of ULONGS for Caps buffer
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// PASS THRU ADDRESS REGISTER LATCH
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#define ARL_CMD_STS_REG 0l
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#define ARL_SMPLCNT_FIFORD 4l
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#define ARL_CHADDRREG_CLEARFIFO 8l
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#define ARL_AD_ENABLE 12l
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#define ARL_PLLREG 16l
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#define ARL_CNTR0 0l
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#define ARL_CNTR1 4l
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#define ARL_CNTR2 8l
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#define ARL_CNT_CTRL_REG 12l
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#define ARL_PORTA 16l
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#define ARL_PORTB 20l
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#define ARL_PORTC 24l
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#define ARL_PORT_CTRL_REG 28l
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#define ARL_DAC_REG 32l
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/* Bit masks for register write operations*/
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#define RWF_OVR 0x00 // reg = newval ONLY
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#define RWF_OR 0x01 // reg |= newval ONE OPTION
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#define RWF_AND 0x02 // reg &= newval VALID AT THE TIME
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#define RWF_RB 0x80 // read back register value if register is r/w
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// can be set with one of the above
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/* DMA mode flags */
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#define DMA_SINGLE 0
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#define DMA_DOUBLE 1
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struct PCI416_COMMAND_REGISTER{
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BITS trigger_select : 2;
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BITS interrupt_select : 1;
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BITS scan_select : 1;
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BITS auto_increment : 1;
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BITS marker_select : 1;
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BITS pretrigger : 1;
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BITS interrupt_enable : 1;
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BITS pll : 3;
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BITS mux_select : 3;
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BITS adm_control : 2;
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BITS dma_on : 1;
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BITS spare : 15;
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};
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typedef union{
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struct PCI416_COMMAND_REGISTER fields;
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DWORD buffer;
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} TPCI416_COMMAND_REGISTER;
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struct PCI416_STATUS_REGISTER{
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BITS trigger_select : 2;
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BITS scan_select : 1;
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BITS auto_increment : 1;
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BITS acquire : 1;
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BITS marker_select : 1;
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BITS pretrigger : 1;
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BITS analog_trigger : 1;
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BITS model : 4;
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BITS arm : 1;
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BITS empty : 1;
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BITS half_full : 1;
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BITS full : 1;
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BITS spare : 16;
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};
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typedef union{
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struct PCI416_STATUS_REGISTER fields;
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DWORD buffer;
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} TPCI416_STATUS_REGISTER;
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struct PCI416_SAMPLE_COUNT_REGISTER{
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unsigned long count;
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};
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struct PCI416_CHANNEL_REGISTER{
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BITS channel : 4;
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BITS scan : 4;
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BITS led : 1;
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BITS spare1 : 7;
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BITS spare2 : 16;
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};
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typedef union{
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struct PCI416_CHANNEL_REGISTER fields;
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DWORD buffer;
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} TPCI416_CHANNEL_REGISTER;
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struct PCI416_CONVERT_ENABLE_REGISTER{
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BITS sparel : 15;
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BITS convert : 1;
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BITS spareu : 16;
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};
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typedef union{
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struct PCI416_CONVERT_ENABLE_REGISTER fields;
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DWORD buffer;
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} TPCI416_CONVERT_ENABLE_REGISTER;
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struct PCI416_PLL_REGISTER{
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BITS data : 4;
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BITS spare1 : 12;
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BITS spare2 : 16;
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};
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typedef union{
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struct PCI416_PLL_REGISTER fields;
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DWORD buffer;
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} TPCI416_PLL_REGISTER;
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struct PCI416_DAC_REGISTER {
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BITS data : 12;
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BITS spare1 : 4;
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BITS spare2 : 16;
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};
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typedef union{
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struct PCI416_DAC_REGISTER fields;
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DWORD buffer;
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} TPCI416_DAC_REGISTER;
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typedef struct {
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union{
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DWORD both;
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struct {
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int low;
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int high;
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} word;
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}sample;
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} TYPE_FIFO_DATA;
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typedef struct{
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WORD model;
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WORD bits;
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WORD channels;
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float fmax_single;
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float fmax_scan;
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WORD channel_scan;
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WORD autoincr_scan;
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WORD scan_select;
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WORD scan_count;
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WORD ssh;
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WORD scycle;
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float minv;
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float maxv;
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long int mincode,maxcode;
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}ADM_STATS;
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typedef struct BoardInfo
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{
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DWORD ADMindex,
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BusNo,
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SlotNo,
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VendorID,
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DeviceID,
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CommandR,
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StatusR,
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ClassCodeR,
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IRLR,
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BADR[6];
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} TBoardInfo;
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typedef TBoardInfo *TBoardInfoPtr;
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enum{single_trigger,continuous_trigger};
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enum{T_INTERNAL,T_EXTERNAL,T_ANALOG,T_ANALOG_FE}; //trigger source
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enum{M_DMA, M_HF_POLL, M_HF_POLL_DDISK,M_HF_INT} ; //acq_mode
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enum{D_MEM, D_DIRECT}; // disk_mode: data to memory or direct to disk
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enum{F_BINARY};
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enum{C_INTERNAL,C_EXTERNAL}; //clock_source
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enum{R_NORMAL,R_BATCH,R_START_EXIT}; //run_mode
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enum{I_DMA, I_HF, I_EOS }; // interrupt mode
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enum{B_NORMAL, B_MARKER}; //marker mode
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#endif
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